About This Course
Description:
Dive into the course ‘Synthesis, Signoff STA & LEC with Lab (Synopsys Tools)’ to gain a comprehensive grasp of the synthesis process, signoff static timing analysis (STA), and logic equivalence checking (LEC) employing Synopsys Tools. This course delves into various facets of these tools and their integration within the design workflow.
Key Highlights:
- Master the fundamentals of synthesis, signoff STA, and LEC
- Learn to effectively utilize Synopsys Tools
- Explore the synthesis and signoff
- STA stages comprehensively Refine your skills in logic equivalence checking
- Engage in hands-on lab exercises for practical application
Learning Objectives
Apply best practices and knowledge to think through a problem rather than try to memorise the solution.
Be able to identify many electrical and mechanical machines.
Apply engineering concepts across multiple engineering disciplines.
Requirements
- Bring your thinking cap (brain) and I will provide the rest!
Target Audience
- Anyone who is curious about how things work.
- Anyone who loves to learn.
- Anyone who enjoys the gift of knowledge.
- Anyone involved with any engineering related discipline
Curriculum
6 Lessons3h 28m
Synthesis, Signoff STA
Draft Lesson
Draft Lesson
Draft Lesson
LEC with Lab
Synopsys Tools
Your Instructors
Google